Susan Eggers

ACM and IEEE Computer Society named Susan Eggers, a professor at the University of Washington’s Paul G. Allen School of Computer Science & Engineering, the recipient of the 2018 Eckert-Mauchly Award. Eggers was cited for outstanding contributions to simultaneous multithreaded processor architectures and multiprocessor sharing and coherency. The Eckert-Mauchly Award is known as the computer architecture community’s most prestigious award.

Widely recognized as one of the leading computer architects in the field, Eggers will be the first woman to receive the Eckert-Mauchly Award in its 39-year history.  She is also atypical among engineers in that she received a BA degree in Economics in 1965 and worked in related fields for 18 years before deciding to switch careers and pursue research in computer engineering. In 1983 she joined the graduate program in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley and began working toward a PhD.  She completed her PhD in 1989, starting her faculty career as assistant professor at the University of Washington at the age of 47.

Eggers’s early work focused on maintaining accurate and efficient cache coherency in shared-memory processors. In computing terminology, a cache refers to a hardware or software component that is used to store frequently-used instructions or data. While cache memory can be retrieved quickly and doesn’t take up much space, problems can arise that can significantly impair data accuracy in shared-memory multiprocessors. For example, in multiprocessor computers, the same data may reside in separate, processor-specific caches. To maintain the uniformity of the data across all processors, however, once one set of data is changed, all copies of the data in other caches throughout the computer system must also change in a timely fashion—otherwise data could potentially be lost or overwritten. This management of data is called cache coherency. Beginning in the late 1980s, Eggers made significant contributions to cache coherency protocols as well as other memory-related challenges in multiprocessor computers. She performed the first data-driven study of data sharing in shared-memory multiprocessors which greatly enhanced the field’s understanding of both hardware and software coherency techniques.

Eggers is best known for her foundational work in developing and helping to commercialize simultaneous multithreaded (SMT) processors, one of the most important advancements in computer architecture in the past 30 years. In the mid-1990s, Moore’s Law was in full swing and, while computer engineers were finding ways to fit up to 1 billion transistors on a computer chip, the increase in logic and memory alone did not result in significant performance gains. Eggers was among those who argued that increasing parallelism, or a computer’s ability to perform many calculations or processes concurrently, was the best way to realize performance gains.

From 1995 through 2003, she and her colleagues at the University of Washington developed and validated the idea of SMT as a way to increase central processing unit (CPU) performance. SMT is a technique that permits multiple independent sequences of programmed instructions (threads) to better utilize a computer’s resources by converting their thread parallelism to a simpler instruction-level parallelism. Eggers and her colleagues at the University of Washington presented several landmark papers at the International Symposium of Computer Architecture (ISCA) and other leading gatherings that demonstrated the underlying concepts, performance benefits and implementation simplicity of SMT.

Today, SMT architecture as developed by Eggers and her colleagues remains an essential component in the processors of commercial manufacturers, including Intel and IBM. Earlier in her career, she initiated technology transfer of SMT to product teams at IBM, Fujitsu, MemoryLogix and Sun Microsystems.

Eggers will be formally recognized with the award at the ACM/IEEE International Symposium on Computer Architecture (ISCA) to be held June 2-6 in Los Angeles.

ACM and IEEE Computer Society co-sponsor the Eckert-Mauchly Award, which was initiated in 1979. It recognizes contributions to computer and digital systems architecture and comes with a $5,000 prize. The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the pioneering large-scale electronic computing machine, which was completed in 1947.