David Bruce Papworth

Digital Library

ACM Charles P. "Chuck" Thacker Breakthrough in Computing Award

USA - 2022

citation

For fundamental groundbreaking contributions to Intel's P6 out-of-order engine and Very Long Instruction Word (VLIW) processors.

The Intel P6 microprocessor was a landmark design, not just for Intel, but for the computer design community. P6 introduced a new microarchitectural paradigm of decomposing complex x86 instructions into sequences of micro-operations that flowed through a microdataflow engine, constrained only by true data dependencies and machine resources. Surprising to many, this scheme also enabled significantly higher clock rates.

To a large extent, it was David Papworth's deep intuitive understanding of multiple computer system levels, hardware, software, operating systems, compilers, languages, algorithms, microcode, and much more, that let the P6 design team successfully navigate the thousands of design tradeoffs required of a modern processor, in a timely way, while striking competitive balances among cost, performance, power, and schedule. Papworth was also the ultimate judge of how and when to use P6's new microcode-patch facility to deal with any design errata that might turn up. That P6 was a runaway success for Intel is clear in that Intel's cores today, 30+ years later, still use the micro-op paradigm, along with many of the architectural improvements shepherded by Dave in 1992.

Just prior to Papworth's joining Intel in 1990, he was a lead designer and system architect at a startup Multiflow, which pioneered the Very Long Instruction Word (VLIW) style of system design. In a series of publications, VLIW inventor Josh Fisher had elucidated why one might want to jam a large number of machine operations into one instruction word, and had explored ways in which a compiler could handle the joint challenge of finding the necessary parallelism in the face of (a) handling multiple conditional branches, and (b) observing the data dependencies among the instructions without sacrificing the concurrency offered by the VLIW itself. Relying on the same acute overall system intuition that he would later wield so successfully on Intel's P6, Papworth re-engineered Fisher's ELI-512 design to be implementable in 1985 hardware, while carefully maintaining those aspects of Fisher's VLIW scheme that were essential to performance. VLIWs are also now well-established in GPU's, AI accelerators, and DSP's, a tribute to Josh Fisher's original vision and to Dave Papworth's ability to juggle extreme complexity and come up with economically viable, industry-influencing solutions.

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